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Rewritable Progammable Logic Array of Current Mode Logic

Authors: Mamoru Tanaka, Shinji Ozawa, Shinsaku Mori

On Minimal Test Sets for Locating Single Link Failures in Networks

Authors: Toshihide Ibaraki, Tsunehiko Kameda, Shunichi Toida

Optimal Layout of CMOS Functional Arrays

Authors: Takao Uehara and William M. van Cleemput

Design to Minimize Diameter on Building-Block Network

Authors: Makoto Imase and Masaki Itoh

Optimization of Microprograms

Authors: Mario Tokoro, Euji Tamura, Takashi Takizuka

A Layout System for the Random Logic Portion of an MOS LSI Chip

Authors: Isao Shirakawa, Noboru Okuda, Takashi Harada, Sadahiro Tani, Hiroshi Ozaki

A Design of Programmable Logic Arrays with Universal Tests

Authors: Hideo Fujiwara and Kozo Kinoshita

This list is based on the data extracted from dblp: IEEE Transactions Computers

Universal tree encoding for speech

Authors: Yasuo Matsuyama and Robert M. Gray

A new achievable rate region for the interference channel

Authors: Te Sun Han and Kingo Kobayashi

Generalized tensor product codes

Authors: Hideki Imai and Hiroshi Fujiya

A hierarchy of codes for memoryless channels

Authors: Takeshi Hashimoto and Suguru Arimoto

An improvement of error exponents at low rates for the generalized version of concatenated codes

Authors: Shigeichi Hirasawa, Masao Kasahara, Yasuo Sugiyama, Toshihiko Namekawa

This list is based on the data extracted from dblp: IEEE Transactions Information Theory