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Highly contributed researchers

Since 2011: Takahiro Hanyu (4)

Naoya Onizawa (3) / Takuya Sakamoto (2) / Hideo Ohno (2)

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Dropout and DropConnect for Reliable Neuromorphic Inference Under Communication Constraints in Network Connectivity

Authors: Yasufumi Sakai, Bruno U. Pedroni, Siddharth Joshi, Satoshi Tanabe, Abraham Akinin, Gert Cauwenberghs

Analog-to-Digital Conversion With Reconfigurable Function Mapping for Neural Networks Activation Function Acceleration

Authors: Massimo Giordano, Giorgio Cristiano, Koji Ishibashi, Stefano Ambrogio, Hsinyu Tsai, Geoffrey W. Burr, Pritish Narayanan

Emerging MPEG Standards for Point Cloud Compression

Authors: Sebastian Schwarz, Marius Preda, Vittorio Baroncini, Madhukar Budagavi, Pablo Csar, Philip A. Chou, Robert A. Cohen, Maja Krivokuca, Sebastien Lasserre, Zhu Li, Joan Llach, Khaled Mammou, Rufael Mekuria, Ohji Nakagami, Ernestasia Siahaan, Ali J. Tabatabai, Alexis M. Tourapis, Vladyslav Zakharchenko

An Accuracy/Energy-Flexible Configurable Gabor-Filter Chip Based on Stochastic Computation With Dynamic Voltage-Frequency-Length Scaling

Authors: Naoya Onizawa, Daisaku Katagiri, Kazumichi Matsumiya, Warren J. Gross, Takahiro Hanyu

Noncontact Measurement of the Instantaneous Heart Rate in a Multi-Person Scenario Using X-Band Array Radar and Adaptive Array Processing

Authors: Takuya Sakamoto, Pascal Aubry, Shigeaki Okumura, Hirofumi Taki, Toru Sato, Alexander G. Yarovoy

Doppler Radar Techniques for Accurate Respiration Characterization and Subject Identification

Authors: Ashikur Rahman, Victor M. Lubecke, Olga Boric-Lubecke, Jan H. Prins, Takuya Sakamoto

Motion Compensation for an Unmanned Aerial Vehicle Remote Radar Life Sensor

Authors: Robert H. Nakata, Brian Haruna, Takashi Yamaguchi, Victor M. Lubecke, Shigeru Takayama, Kiyotsugu Takaba

Low Latency IDMA With Interleaved Domain Architecture for 5G Communications

Authors: Tran Thi Thao Nguyen, Leonardo Lanante, Shingo Yoshizawa, Hiroshi Ochi

Programmable Neuron Array Based on a 2-Transistor Multiplier Using Organic Floating-Gate for Intelligent Sensors

Authors: Islam A. K. M. Mahfuzul, Masamune Hamamatsu, Tomoyuki Yokota, Sunghoon Lee, Wakako Yukita, Makoto Takamiya, Takao Someya, Takayasu Sakurai

Three-Dimensional Dynamic Random Access Memories Using Through-Silicon-Vias

Authors: Toshiaki Kirihata, John Golz, Matthew R. Wordeman, Pooja Batra, Gary W. Maier, Norman Robson, Troy L. Graves-abe, Daniel Berger, Subramanian S. Iyer

Design Challenges in 3-D SoC Stacked With a 12.8 GB/s TSV Wide I/O DRAM

Authors: Takao Nomura, Ryo Mori, Koji Takayanagi, Kazuki Fukuoka, Koji Nii

An Overview of Nonvolatile Emerging Memories - Spintronics for Working Memories

Authors: Tetsuo Endoh, Hiroki Koike, Shoji Ikeda, Takahiro Hanyu, Hideo Ohno

Hardware Implementation of Associative Memories Based on Multiple-Valued Sparse Clustered Networks

Authors: Naoya Onizawa, Hooman Jarollahi, Takahiro Hanyu, Warren J. Gross

Guest Editorial Emerging Topics in Multiple-Valued Logic and Its Applications

Authors: Vincent C. Gaudet, Jon T. Butler, Robert Wille, Naofumi Homma

LUT Cascades Based on Edge-Valued Multi-Valued Decision Diagrams: Application to Packet Classification

Authors: Hiroki Nakahara, Tsutomu Sasao, Hisashi Iwamoto, Munehiro Matsuura

Design of a DC-DC Converter With Phase-Controlled Class-D ZVS Inverter

Authors: Yuta Yamada, Tomoharu Nagashima, Yoshifumi Ibuki, Yoshiki Fukumoto, Tatsuya Ikenari, Hiroo Sekiya

A Nonvolatile Associative Memory-Based Context-Driven Search Engine Using 90 nm CMOS/MTJ-Hybrid Logic-in-Memory Architecture

Authors: Hooman Jarollahi, Naoya Onizawa, Vincent Gripon, Noboru Sakimura, Tadahiko Sugibayashi, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu, Warren J. Gross

Power-Efficient Hardware Architecture of K-Means Clustering With Bayesian-Information-Criterion Processor for Multimedia Processing Applications

Authors: Tse-Wei Chen, Chih-Hao Sun, Hsiao-Hang Su, Shao-Yi Chien, Daisuke Deguchi, Ichiro Ide, Hiroshi Murase